EC EN 520
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Advanced Digital Systems
Course Description
Advanced synchronous systems design; CAD and HDLs; high-speed, low-power digital circuit architectures.
When Taught
Fall
Min
3
Fixed/Max
3
Fixed
3
Fixed
0
Other Prerequisites
EC En 323 or proficiency in HDL digital system design.
Title
4.
Learning Outcome
Be able to design and deploy appropriate verification strategies for digital systems.
Title
2.
Learning Outcome
Be able to do design and analysis of digital systems using both the VHDL and Verilog languages and targeting a variety of different configurable devices.
Title
1.
Learning Outcome
Understand and be able to write critically about the past, current state, and future of the semiconductor industry via the current ITRS roadmap documents and additional technical papers.
Title
3.
Learning Outcome
Understand the issues associated with and be able to analyze the power consumption of digital designs.
Title
5.
Learning Outcome
Understand the low level details of FPGA chip architectures sufficient to enable the creation of optimized circuits which take advantage of chip-specific features.
